Conventionally, in the method of manufacturing semiconductor device, at least part of the surface of the electrically conductive layer (including a semiconductor layer) has been exposed by the etching process and, a film (including oxide film) is deposited on this exposed surface of the conductive layer. Prior to such film deposition, washing and rinsing with water are conducted, for example, after a photoresist is removed. If an underlying metallic film is exposed, as in the through hole process, then the photoresist is removed, the rest is rinsed with an organic solvent and the surface of the underlying metallic film may be sputter etched (reversely sputtered) by argon gas or the like within a sputtering equipment.
A conventional method of manufacturing semiconductor device is hereinafter described with reference to the accompanying drawings. FIG. 1 is a cross-sectional view illustrating a process of the conventional method. FIG. 2 is a cross-sectional view illustrating a process of the conventional method. FIGS. 3A through 3C are respectively a cross-sectional view illustrating the processes according to the conventional method in the order in which they are followed. FIG. 4 is a cross-sectional view illustrating a process of the conventional method.
First, as illustrated in FIG. 1, an n.sup.+ -type diffusion layer 62 is formed on the surface of a p-type silicon substrate 61, an insulating film 63 having the thickness of about 0.5 through 1.0 .mu.m comprising, for example, a silicon oxide film is formed on its entire surface, a contact hole reaching the diffusion layer 62 is formed on the insulating film 63 by plasma etching taking the photoresist as a mask and the photoresist is removed by ashing by oxygen plasma. At this time, a surface layer 62a having the thickness of about 2 through 5 nm is formed on the surface of the diffusion layer 62 exposed at the contact hole. The surface layer 62a is mainly comprised of a naturally oxidized film, and is damaged by the effect caused by the plasma etching as the contact hole is formed and the plasma ashing as the photoresist is removed. Further, this surface layer 62a contains contaminated substances such as a heavy metal and hydrocarbon polymer ((CH.sub.2).sub.n : n is positive integer) and the like, as added when the photoresist is removed. Next, a polycrystalline silicon film 64a having the thickness of about 0.5 .mu.m is formed by thermal decomposition reaction of monosilane (SiH.sub.4), with the nitrogen gas as a carrier gas, within an LPCVD equipment. Subsequently, it is taken out of the LPCVD equipment and the polycrystalline silicon film 64a is turned into n.sup.+ -type by the thermal diffusion of the phosphor or the like and is etched by the photolithography process, to form an interconnection made of the polycrystalline silicon film 64a.
Next, as illustrated in FIG. 2, in the conventional method of forming the through hole for multiple layer interconnection, an insulating film 73a having the thickness of about 0.5 through 1.0 .mu.m comprising, for example, a silicon oxide film is formed on a p-type silicon substrate 71, and an n.sup.+ -type polycrystalline silicon film 74 having the thickness of about 0.1 through 0.2 .mu.m is formed on the entire surface of the insulating film 73a. Further, a tungsten silicide film 79 having the thickness of about 0.1 through 0.2 .mu.m is formed on the entire surface of the polycrystalline silicon film 74 by sputtering. These are patterned to form a lower layer interconnection comprising the n.sup.+ -type polycrystalline silicon film 74 and the tungsten silicide film 75. Next, by the CVD method, an insulating film 73b having the thickness of about 0.9 .mu.m, which comprises, for example, a silicon oxide film, is formed on the entire surface, a through hole reaching the tungsten silicide film 75 is formed through the insulating film 73b by the plasma etching, with the photoresist as the mask, and the photoresist is removed by the ashing by oxygen plasma. At this time, a surface layer 75a having the thickness of about 2 through 5 nm is formed on the surface of the tungsten silicide film exposed at the through hole. This surface layer 75a is mainly comprised of a naturally oxidized film, as in the foregoing surface layer 62a, and is damaged by the effect caused by the plasma etching and the plasma ashing. Further, this surface layer 75a contains contaminated substances such as heavy metals, hydrocarbon polymers or the like. Next, within the sputtering equipment, a metallic film having the thickness of about 0.5 .mu.m comprising, for example, an aluminum film, tungsten film or the like is deposited on the entire surface. Subsequently, it is taken out of the sputtering equipment and the metallic film is etched by the photolithography process to form the upper layer interconnection 76.
Next, as illustrated in FIG. 3A, in the conventional method of forming a capacitor dielectric for a DRAM, an n.sup.+ -type diffusion layer 82 is formed on the surface of the p-type silicon substrate 81 and an insulating film 83 having the thickness of about 0.5 through 0.7 .mu.m, which comprises, for example, a silicon oxide film, is formed on the entire surface. Further, a contact hole reaching the diffusion layer 82 is formed on the insulating film 83 and a polycrystalline silicon film (not shown) having the thickness of about 0.4 .mu.m is formed on the entire surface by the thermal decomposition reaction of the monosilane using the LPCVD equipment, Next, it is taken out of the LPCVD equipment, and the polycrystalline silicon film is turned into the n.sup.+ -type by the thermal diffusion of the phosphor and the like and is etched by the plasma etching with the photoresist as the mask. Subsequently, the photoresist is removed by ashing by oxygen plasma to form a storage node electrode 84 comprising the polycrystalline silicon film. At this time, a surface layer 84a having the thickness of about 2 through 5 nm is formed on the surface of the storage node electrode 84. This surface layer 84a also mainly comprise's a naturally oxidized film, as in the surface layer 62a of FIG. 1, and is damaged to contain the contaminated substances such as the heavy metal, hydrocarbon polymer and the like.
Next, as illustrated in FIG. 3B, within the LPCVD equipment, a silicon nitride film 87 having the thickness of about 5 through 10 nm is entirely formed by the gas phase chemical reaction of the dichlorosilane (SiH.sub.2 Cl.sub.2) and ammonia gas (NH.sub.3) with the nitrogen gas as carrier gas.
Next, as illustrated in FIG. 3C, within the same or another LPCVD equipment, a polycrystalline silicon film having the thickness of about 0.4 .mu.m is formed by the thermal decomposition reaction of the monosilane with the nitrogen gas as carrier gas. Subsequently, it is taken out of the LPCVD equipment, the polysilicon film is turned into the n.sup.+ -type by the thermal diffusion of the phosphor or the like, and the polycrystalline silicon film and the silicon nitride film 87 are etched by the photolithography process to form a plate electrode 86 comprising a polycrystalline silicon film and a capacitor dielectric 87a comprising the silicon nitride film.
Next, as illustrated in FIG. 4, in the conventional method of forming a gate oxide film, a pad oxide film (not shown) and a silicon nitride film (not shown) are formed on the surface of the p-type silicon substrate 91, and a field oxide film 93 having the thickness of about 0.6 through 0.8 .mu.m is formed according to a known selective oxidizing method and the silicon nitride film and the pad oxide film are removed by etching to expose the part of the surface of the silicon substrate 91 which corresponds to the area for forming the element. At this time, a surface layer (not shown) is formed on the exposed surface of the silicon substrate 91. This surface layer has the thickness of about 2 nm and contains contaminated substances such as the carbon compounds or the like. Next, within the thermal oxidizing furnace, a gate insulating film 98 having the thickness of about 15 nm, which comprises a silicon oxide film, is formed on the exposed surface of the silicon substrate 91 by the reaction between the hydrogen gas (H.sub.2) and the oxygen gas (O.sub. 2) with the nitrogen gas or helium gas as carrier gas. At this time, a pit-shaped cavity is formed on the gate insulating film 98. This cavity is produced because, by the generation of the silicon carbide caused by the reaction between, for example, the carbon and the silicon, oxidization of the surrounding silicon is impeded. Next, a gate electrode 99 comprising an n.sup.+ -type polycrystalline silicon film is formed, and n.sup.+ -type diffusion layers 92a, 92b, which serve as the source area and the drain area respectively, are formed to form a MOS transistor.
However, in the conventional method of manufacturing semiconductor device, when after at least part of the surface of the conductive layer (including the semiconductor layer) is exposed by the etching process the film (including the oxide film) connected to the exposed surface of the conductive layer is formed, since the foregoing method and the film forming unit are adopted, the surface layer formed according to the exposure of the surface of the conductive layer cannot completely be removed, and the presence of this surface layer causes various disadvantages.
These various disadvantages are specifically described. These surface layers undergo the damage caused by the plasma, and further includes the contaminated substances such as the heavy metals, carbon compounds and the like, and is mainly composed of the naturally oxidized film.
For the contact hole, the presence of the naturally oxidized film causes the contact resistance to be increased, and causes a problem especially for the fine contact hole smaller than 0.4 .mu.m in each side of its square. Further, if the surface layer is damaged or is contaminated by the heavy metal, then the contact leak current is increased, and the presence of the heavy metal causes generation of the crystalline defects.
Further, for the through hole, the presence of the naturally oxidized film causes the contact resistance to be increased, as in the contact hole, and the presence of the damage and the contamination causes reduction of the long-term reliability. In this case, as described above, prior to deposition of the metallic film of the upper layer interconnection by the sputtering equipment, it is possible to remove the surface layer of the lower layer interconnection by argon sputtering or the like so that the increase of the contact resistance can be alleviated. However, this sputter etching or reverse sputtering causes generation of the damage and adhesion of the contaminated substance, which causes a new surface layer to be formed leading to no complete solution in the aspect of the long-term reliability.
For the capacitor dielectric in the DRAM, if the naturally oxidized film is present, then the capacitance is lowered, and the presence of the damage and the contamination causes deterioration of the reliability such as inferior voltage-proof performance and the increase of the leak current of the capacitive insulating film or the like.
Further, for the gate insulating film, the thickness of the surface layer comprising the naturally oxidized film is thinner than in other cases, but the presence of the contamination causes a serious problem. For example, if the oxidized silicon film is included within the contaminated surface layer lying on the gate insulating film, a factor of a shape depending on the pit-shaped cavity or the like and the contaminated substances form a leak path causing deterioration of the reliability such as the inferior voltage-proof performance.